Andrea Stanco

Over the last decades, Quantum Key Distribution (QKD) has risen as a promising solution for secure communications, a pressing subject in the aftermath of the security threat posed by Quantum Computers and the Shor's Algorithm. Offering a theoretically secure way to share secret keys between parties, QKD state of the art has witnessed remarkable progress in the last years. Nonetheless, although theoretically secure, QKD is not implementation-secure and until now, the study of physical vulnerabilities in QKD setups has mainly focused on the optical channel. The concept of attacking a cryptographic system via its physical characteristics and associated leakages, known as side-channel analysis, was firstly introduced in classical cryptography, with the seminal work of Paul Kosher. Since then, power and electromagnetic side-channel analysis have become a staple in classical cryptanalysis. However, these concepts have hardly been applied to QKD. In this work, we propose and implement a new method for side-channel analysis on QKD systems, by exploiting the power consumption of the electronic driver controlling the electro-optical components of the QKD transmitter. For high-rate transmission, QKD modules typically require electronic drivers, such as Field Programmable Gate Arrays (FPGAs). Here, we will show that the FPGA's power consumption can leak information about the QKD operation, and consequently the transmitted key. The analysis was performed on the QKD transmitter at the University of Padua. Our results are consistent and show critical information leakage, having reached a maximum accuracy of 73.35% in the prediction of transmitted random keys at 100 MHz repetition frequency.

For quantum communication applications, time-to-digital converters (TDCs) are a crucial tool whose performance can severely affect the quality of the entire application. Nowadays, FPGA-based TDCs present a viable alternative to ASIC ones, once the nonlinear behaviour due to the intrinsic nature of the device is properly mitigated. To compensate said nonlinearities, a calibration procedure is required. Maintaining this calibration consistent during long measurements requires either interpolation methods or stopping data acquisition for a fixed time to perform the calibration process. Here we present a design and demonstration of an FPGA-based TDC showing a residual jitter of 27 ps, that is scalable for multichannel operation. We present a unique calibration method that exploits single-photon detection, which does not require stopping the data acquisition or using any interpolation methods, while keeping the device calibrated to the best of its ability. This allows Bob to receive time-tags with the best possible accuracy while also removing data-loss phases. This calibration method was tested in a relevant environment, investigating the device behaviour between 5 °C and 80 °C, where the residual jitter of the TDC was shown to be kept under control.